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annotate dot_config/helix/runtime/queries/verilog/indents.scm @ 879:0a7f9b99faab draft

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feat: add verilog textobjects
author Zeger Van de Vannet <zeger@vandevan.net>
date Fri, 19 Apr 2024 16:59:12 +0200
parents 837fdac1f972
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
878
837fdac1f972 feat: add some verilog indent options
Zeger Van de Vannet <zeger@vandevan.net>
parents:
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1 [
837fdac1f972 feat: add some verilog indent options
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2 (module_declaration)
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3 (seq_block)
837fdac1f972 feat: add some verilog indent options
Zeger Van de Vannet <zeger@vandevan.net>
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4 ] @indent
837fdac1f972 feat: add some verilog indent options
Zeger Van de Vannet <zeger@vandevan.net>
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5
837fdac1f972 feat: add some verilog indent options
Zeger Van de Vannet <zeger@vandevan.net>
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6 [
837fdac1f972 feat: add some verilog indent options
Zeger Van de Vannet <zeger@vandevan.net>
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7 "end"
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8 "endmodule"
837fdac1f972 feat: add some verilog indent options
Zeger Van de Vannet <zeger@vandevan.net>
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9 ] @outdent