view dot_config/helix/runtime/queries/verilog/indents.scm @ 879:0a7f9b99faab draft

feat: add verilog textobjects
author Zeger Van de Vannet <zeger@vandevan.net>
date Fri, 19 Apr 2024 16:59:12 +0200
parents 837fdac1f972
children
line wrap: on
line source

[
 (module_declaration)
 (seq_block)
] @indent

[ 
  "end"
  "endmodule"
] @outdent